The present invention relates to a phase lock loop, and more specifically, to a system and method for controlling a phase lock loop having two or more control paths.
A phase lock loop (PLL) is a well-known electronic closed loop feedback control circuit typically used for frequency/timing control in a variety of applications. The PLL provides an output signal that is locked in phase of an input reference signal. A voltage controlled oscillator (VCO) is an integral part of the PLL that produces an output frequency signal that varies proportionally to a control voltage input to the VCO. To cover a wide frequency range and get low phase noise, stitched digital bands or one large band may be employed. However, the use of one large band may result in gain variation, and since the oscillation frequency of the VCO may drift with variation in temperature or fabrication processes, a large overlap between the stitched bands may be needed to account for the frequency drift, but such a design may affect other performance characteristics of the PLL, such as tuning range or phase noise. Accordingly, and while existing PLLs may be suitable for their intended purpose, the art of PLLs may be advanced by using alternative methods of controlling the VCO within the PLL.